Scheduled PoW upgrades proposal

A major motivation for memory hard PoWs is to limit performance by the memory IO bottleneck.

If the memory requirements are set too low, as for instance in the case of Litecoin’s scrypt, then the resulting single-chip ASICs are not meaningfully different from pure computational ones like Bitcoin’s sha256. The same destiny befell Zcash’ Equihash, although they missed the opportunity to set much larger memory requirements at launch. Only ethash has so far succesfully resisted single chip ASICs.

Since the amount of memory that can economically be fit on a single chip grows over time, as one of many illustrations of Moore’s law, it behooves a memory hard PoW to also have increasing memory requirements.
Ethereum’s ethash PoW recognized this in having a linearly growing dataset (growing by 8 MB every 125 hours; see appendix J of https://ethereum.github.io/yellowpaper/paper.pdf).

I propose to have a similar linear increase in memory requirements for Grin’s long term PoW, Cuckatoo Cycle.

Specifically, after 2^k years, we will phase out the use of cuckatoo32+k. So cuckatoo32 will be phased out after 1 year, cuckatoo33 after 2 years, cuckatoo34 after 4 years, etc.

That means we’ll be mining cuckatoo42, using 1TB, in only 2^(41-32) = 512 years. Mark your calendars!

I additionally propose the following mechanism for phase out:

Each size cuckatooN has a natural scaling factor of 2^(N+1) * N.
Upon phaseout, the latter factor N will be reduced by 1 every week, until it reaches 0.
For instance, cuckatoo32 difficulty scaling will linearly decrease over 32 weeks, or between 7 and 8 months.

This fixed upgrade schedule relieves us of the need to try identify single chip miners and hardfork away from them. We would instead trust that any advantage of single chip designs is shortlived.

Furthermore, we will be able to tell after the fact, by seeing how much hashpower resides in a size that’s being phased out.

5 Likes

We would instead trust that any advantage of single chip designs is shortlived.

So the goal is to allow asics to exist? And you believe they will exist during the 2 years?

I’m confused, I think I missed a chapter. What is Cuckatoo Cycle ?

Also is the plan to combine Cuckoo Cycle and Equihash for the first 2 years still holding ?

Cuckatoo Cycle is the variant of Cuckoo Cycle introduced in
https://www.grin-forum.org/t/cuckoo-cycle-weakness-and-possible-fix

The PoW plans are described in Item 2 of
https://www.grin-forum.org/t/meeting-notes-governance-sep-11-2018

1 Like

The transistor doesn’t shrink as easily as it used to. Fixing an assumption of an everlasting Moore’s Law misses that.

Around the “5nm” process (depended on how each foundry defines it) we hit hard quantum mechanical limits.

I’m not making that assumption.
That’s why I only let memory grow linearly, not exponentially.

In any case it assumes everlastingly physically larger devices in the case the transistor isn’t shrinked (or replaced).

1 Like

There are other memory types apart from 6T SRAM. Nobody is forcing SRAM lean mining. Seems much more interesting compared to monolithic 7nm (stealth) single cuckatoo32 chips.

While it likely won’t be morres law type growth, there are other options to increase “transistor” efficiency.

If its a “reversible gate”, current isn’t being intentionally sent to ground, so that election is still in the circuit for a bit longer. Or something like that.

I think the linear assumption is fine, the transistor “brick wall” has smart people working on it.

Not assuming that either. Only assuming that, whereas memory capacities have historically grown exponentially, they will keep growing at least linearly in the future.

@photon are there 7nm cuckatoo32 chips already? If yes, who is making them?

Not that we know of. Seems unlikely since cuckatoo didn’t even exist up until a couple of weeks ago.

This proposal was adopted as is in the latest Governance meeting.

Sorry to resurrect an old thread, but why is it desirable to avoid single-chip ASICs?

1 Like

So that the miners more resemble general purpose computing hardware with separate memory chips, with the potential to accelerate advances in memory technology and adoption thereof. Obsolete mining hardware with lots of fast memory chips also offers more hope of recyclability.

I’m concerned that such advances in memory technology would almost certainly be patentable. This would allow the firm that developed and patented these advances to monopolize mining, and thus reduce or destroy competition between manufacturers.

I think that instead of a boon, it could be a disaster. Edit: Similar to Asicboost, for example.

Recyclability is certainly desirable, but I think that ensuring a competitive mining landscape is more important.

Also, technologies like EMIB[0] might reduce the penalty for inter-die communication in multi-die chip designs, making multi-die designs have similar bandwidth/latency when compared to single-die designs.

[0] https://www.intel.com/content/www/us/en/foundry/emib.html

It’s possible, but we’ve seen groups like NVIDIA who own patents selling their products instead of using them to mine themselves. Unlike asic designs, memory designs are marketable to a wider audience. the greater greed may not have anythign to do with mining.

Also, sorry for not phrasing the initial question like this, but what would the benefits to Grin itself be? Advancing in memory technology and promoting recycling are worthy goals, but I think that the proof of work should be chosen primarily based on its merits with respect to the health of the system.

In that sense it’s a big experiment, to see if memory IO bound PoW can yield as competitive a mining competition as compute bound IO does. Which may take many years to find out.

1 Like